1. Technical Field
The present invention relates to a programmable memory device and an access method thereof, and relates more particularly to a programmable memory device comprising a plurality of one-time programmable memory units and an access method thereof.
2. Related Art
Due to the variations in process parameters among manufacturing equipment, manufactured integrated circuits may have, in varying degrees, process parameter variations between lots, wafers, and even chips on a wafer, and such variations may result in the component parameter variations of integrated circuit components such as resistors, capacitors, and transistors. As a result, circuits comprised of integrated circuit components, such as oscillators or voltage regulators, generate frequencies or output voltages that may deviate from their design values. If a parameter variation in the circuit of a chip is too large, exceeding the tolerance range in a specification, the chip will be determined defective. Thus, the semiconductor manufacturers usually need a fine-tuning procedure to reduce the variations of the circuits and improve manufacturing yields. Generally, the fine-tuning procedure applies a one-time programming (OTP) component, for example a fuse or a metal wire, to achieve a fine-tuning function.
A common adjusting method applying OTP means to ordinary integrated circuits comprises a laser trim method or a method (such as an E-fuse method) relying on a poly fuse structure. A laser trim method needs multiple OTP components, for example metal wires, to conduct programming. In the process of programming, a high-energy laser is used to blow different metal wires. Alternatively, the E-fuse method uses multiple OTP components, for example polysilicon wires or metal wires, for programming. In the process of programming, large current or voltage is applied to blow different polysilicon wires or metal wires. The above programming processes are irreversible and destructive operations, meaning the OTP components are unusable after the programming.
For repeatable programming, multiple-time programming (hereinafter referred to as MTP) components such as erasable programmable read only memories (EPROMs), electrically erasable programmable read only memories (EEPROMs), and flash memories are adopted. However, MTP components need additional circuits and complex manufacturing processes to build, resulting in high manufacturing cost. Further, MTP components need specific semiconductor manufacturing processes, consequently increasing the risk of failing to meet production targets.
Therefore, if OTP components have multiple-time programming capability, the manufacturing processes and cost can be reduced, and the OTP components can be configured multiple times. U.S. Pat. No. 6,728,137 discloses a programmable memory structure. Referring to FIG. 1, the programmable memory structure 10 is configured to use a plurality of memory blocks 15 to achieve a multiple-time programming function. The control circuit 11 writes data into and reads data from the programmable memory structure 10 through a row decoder 12 and a column decoder 13. During operation, the programmable memory structure 10 needs an additional record element 14 to record which memory block(s) 15 is (are) programmed.
In the conventional programmable memory structure 10, when new data is written, the data will be written into a new OTP memory block regardless of the quantity of the data. Even if only one bit of data is written, the conventional programmable memory structure 10 uses an entire OTP memory block to store the single bit of data. Consequently, when storing data, the conventional programmable memory structure 10 is prone to wasting storage space.
In summary, the industry urgently needs a programmable memory device comprising a plurality of one-time programmable memory units that does not have the above disadvantages.